1. Field of the Invention
The present invention generally relates to multilayer connectors and, more particularly, is directed to a multilayer connector for use in ultra large scale integrated (ULSI) semiconductor device.
2. Description of the Prior Art
In a semiconductor integrated circuit such as a ULSI, a plurality of wiring layers must be laminated via an interlevel insulator between adjacent layers in accordance with the increase of integration level and of scale. For example, in the ULSI in which field effect transistors (FETs) constructing a memory cell as a circuit element are arrayed to form a predetermined circuit, a multilayer structure is frequently employed in which the respective electrodes of, for example, the FETs or the wiring layers are formed as an under layer or as a first wiring layer, a second wiring layer of a predetermined pattern is formed on the first wiring layer through an interlevel insulator and the upper second wiring layer is communicated with and coupled to the lower first wiring layer via an opening (contact hole) bored through the interlevel insulator in a predetermined connection relation.
In the case of the above-mentioned structure, in accordance with the increase of integration level and large scale, it is requested that the area of the contact hole bored through the interlevel insulator must be reduced as much as possible.
In the interlevel insulator, it is requested that the thickness of the interlevel insulator is increased to a certain extent in order to improve an insulating property and withstand voltage of the upper and lower wiring layers sandwiching the interlevel insulator, thereby the contact hole formed through the interlevel insulator for contact being increased in depth.
On the other hand, the second wiring layer of the upper layer is generally formed by the sputtering-process of Al (aluminum). In this case, it is difficult to insert the second wiring layer into the above-mentioned deep contact hole of small diameter with excellent coverage so that this second wiring layer is sufficiently brought in contact with the first wiring layer of the under layer electrically and mechanically. As a consequence, mis-contact, mis-coverage occur and a resistance value is increased, which unavoidably degrades the reliability.
For this reason, in the case of employing this kind of the multilayer wiring structure, before forming the second wiring layer of the upper layer, an Si layer is formed on the whole surface of the interlevel insulator involving the contact hole by a CVD (chemical vapor deposition) method. Thereafter, a so-called etch back is carried out to remove the Si layer on the interlevel insulator except the Si layer within the contact hole and then the second wiring layer of the upper layer is formed.
According to the above-mentioned structure, the first and second wiring layers are electrically coupled to each other by means of a coupling conductor formed of an Si layer filled into the contact hole of the interlevel insulator.
In accordance with this structure, however, since the coupling conductor is formed of the Si layer, the resistance value cannot be decreased sufficiently as compared with the metal and the etch back process is needed, which increases the number of working processes. As a result, the multilayer connector cannot be mass-produced efficiently.
Recently, a technology for selectively growing a metal having a high melting point such as tungsten W or the like has been developed. Therefore, it is proposed that metal having high melting point such as tungsten W or the like grown by the above-mentioned selective growing process is employed as the coupled conductor filled into the contact hole of the interlevel insulator.
The high melting point metal such as tungsten W or the like is selectively grown by the reduction of, for example, WF.sub.6 gas. By selecting the growing conditions thereof, the growing speed is allowed to considerably increase on the conductive layer as compared with the insulating layer, thereby the selective growth being realized substantially. By effectively utilizing this selective growth, the tungsten W is selectively grown only on the second wiring layer of the under layer exposed to the outside through the contact hole of the interlevel insulator, thereby the coupled conductor made of tungsten W being formed so as to refill the contact hole.
According to the multilayer connector structure using the coupled conductor made of metal such as tungsten W or the like, the electrical resistance in this coupled portion is reduced, and the etch-back process is not required, which can therefore increase efficiency in working.
However, as shown in FIG. 1, according to this conventional method, if the first wiring layer 21 of the under layer is made of a material such as Al or the like which can be treated by the sputtering-process with ease, there is then the disadvantage such that the multilayer connector will be degraded in reliability.
That is, if a contact hole 2A is bored through an interlevel layer 2 made of material such as SiO.sub.2 or the like, as shown in a longitudinal diagrammatic view of a section forming FIG. 2, the interlevel insulator 2 made of material such as SiO.sub.2 or the like is formed on the whole surface of the first wiring layer 21 made of the Al under layer or the like and formed on a semiconductor substrate 1 having a surface insulating layer, for example. Then, an etching mask layer 3 made of photoresist or the like is formed on the interlevel insulator 2.
Through this etching mask layer 3, a contact hole 3A is formed on the contact hole forming portion by a well-known optical photography technique, i.e., the pattern exposure and development.
Then, as shown in FIG. 2, the mask layer 3 is employed as the mask and the contact hole 2A, which is substantially identical with the contact hole 3A of the mask layer 3, is bored through the interlevel insulator 2 via the contact hole 3A by the reactive ion etching (RIE) process.
In the next process, as shown in FIG. 3, the mask layer 3 is removed and the tungsten W is refilled only on the portion of the first wiring layer 21 of the under layer which portion is exposed to the outside through the contact hole 2A, that is, the tungsten W is refilled only into the contact hole 2A to thereby form a coupling conductor 4 made of tungsten W by the selective W-CVD method using WF.sub.6 gas. A second wiring layer 22 of an upper layer of a predetermined pattern made of an Al layer or the like is formed on the interlevel insulator 2 involving the coupling conductor 4.
In this way, the first and second wiring layers 21 and 22 are electrically connected to each other by means of the coupling conductor 4 refilled into the contact hole 2A bored through the predetermined portion of the interlevel insulator 2.
However, according to the above conventional method, the anisotropy etching process forming the contact hole 2A on the interlevel insulator 2 is carried out by the RIE process having strong ion so that, when the contact hole 2A is bored, then the metal of the first wiring layer 21, e.g., Al is exposed by the sputtering-process. As a result, as shown in FIGS. 2 and 3, an unstable smudge 5 such as a so-call Al crown, Al particle or the like is deposited on the inner circumferential surface of the contact hole 2A. Under this state, if the coupling conductor 4 is formed within the contact hole 2A by, for example, the selective W-CVD process, then this coupling conductor 4 tends to be peeled off. Also, if the connection resistance between the first and second wiring layers is increased. Thus, the reliability of this conventional multilayer connector will be degraded.